Job Description
* Design and optimize transistor-level circuits for 3-dimensional non-volatile memory
* Block level and full-chip verification
* Layout supervision
* Silicon debug
Requirements
* MSEE (including those graduating in Autumn quarter)
* Must be familiar with MOS transistor characteristics
* Course work should include analog circuit design and device physics if there is no prior analog/memory circuit design experience
* Prior work experience is not required
Potential circuit design work in this position
* Voltage/current reference
* Voltage regulator
* Charge pump
* Sense amplifier
* Clock oscillator
* Register/SRAM/CAM
* IO circuitry
* Memory array related circuitry, e.g. decoder, read/write data path, etc.
In this position, the individual may be involved in both analog and digital circuit designs and the design is 90% transistor-level.
Benefit
* Stock Options
* ESPP
* Matched 401(K)
* Health insurance
* Tuition reimbursement
Job Location: Milpitas
Below are some links regarding the 3D memory. 3D memory group at Sandisk was through acquisition of Matrix Semiconductor.
http://www.extremetech.com/article2/0,1697,1814642,00.asp
http://www.eetimes.com/news/semi ... articleID=163100505
http://www.itmedia.co.jp/news/articles/0505/11/news066.html
If interested, please forward your resume to Tz-yi Liu (tliu@sandisk.com)
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